New IBM POWER7 details

The Inquirer has a very interesting article regarding the new features of IBM’s next high performance CPU.

The new IBM processor also has wider per-core execution at 6 ops per cycle (the Alpha was designed for 8 ops per cycle in 2000, though), a whopping 32MB shared eDRAM L3 cache on chip fed by 100 GBps dual 2-channel DDR3 controllers and 360 GBps inter-CPU fabric. It even has Turbo Mode and Power Gates just like on Intel’s Nehalem. And all that is scheduled to run at 4GHz, if IBM doesn’t break its promises.

Read more at The Inquirer.

Advertisements
This entry was posted in HPC News and tagged , , . Bookmark the permalink.

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s